Appeal No. 1999-0848
Application No. 08/634,310
Data Systems, Inc., 730 F.2d 1440, 1444, 221 USPQ 385, 388 (Fed.
Cir.); cert. dismissed, 468 U.S. 1228 (1984); W.L. Gore and
Associates, Inc. v. Garlock, Inc., 721 F.2d 1540, 1554, 220 USPQ
303, 313 (Fed. Cir. 1983), cert. denied, 469 U.S. 851 (1984).
With respect to representative claim 8, the Examiner
attempts to read the various limitations on the disclosure of
Nakano, directing particular attention to the illustration in
Figure 3(f) of Nakano. As part of the analysis at page 4 of the
Answer, the Examiner, in addressing the claim language which
requires “... a field oxide on said surface and surrounding said
device region,” admits that Nakano does not disclose a well
region to define a device forming region on the surface of a
semiconductor body. In attempting to correct such deficiency,
the Examiner offers an obviousness rationale to supply the
missing teaching.
After reviewing the statement of the Examiner’s position in
the Answer, it is apparent to us that, since the Examiner
admitted that all claimed elements are not present in Nakano, a
prima facie case of anticipation has not been established.
Accordingly, since all of the limitations of claim 8 have not
been shown to be expressly disclosed or inherent in the applied
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