Ex Parte KELLEY et al - Page 8



          Appeal No. 2000-1187                                       Page 8           
          Application No. 08/723,174                                                  

               PCI [b]us 10 to the PCI Slave State Machine and                        
               Combinatorial logic means 31 (emphasis added).                         
          We find that Cohen’s data lines (10A) are separate from control             
          lines which are connected between the PCI bus and the access                
          grant register(PCI-RST#LINE) as well as the logic means on the              
          PCI bus interface chip(PCI control signal lines).  Additionally,            
          Cohen provides no teachings related to a bus bridge driving 32              
          address data lines and using one of the 32 lines reserved to                
          select local buses for enabling the device.  We disagree with the           
          examiner’s characterization of “selected control lines on the PCI           
          bus” as the address data lines since Cohen’s control lines are              
          dedicated control lines and are clearly separate from data lines            
          10A.  Therefor, we find that the examiner has not met the burden            
          of providing a prima facie case of anticipation.  Accordingly, we           
          reverse the rejection of claims 5, 10 and 15 under 35 U.S.C.                
          § 102 over Cohen.                                                           














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