Ex Parte SCHONAUER et al - Page 6



          Appeal No. 2002-1992                                                        
          Application 09/206,170                                                      
          or considerable amount, quantity, size, etc.”2  See Allen                   
          Engineering Corp. v. Bartell Industries Inc., 299 F.3d at 1344,             
          63 USPQ2d at 1772.                                                          
               Chen discloses a method for forming a semiconductor device             
          on a wafer, comprising forming a dual damascene via and wire                
          definition in a dielectric layer, depositing a barrier layer on             
          exposed surfaces of the dielectric layer including the surfaces             
          within the dual damascene via and wire definition, filling the              
          dual damascene via and wire definition with a conductive metal              
          such as copper or aluminum, and then planarizing, by a method               
          such as chemical mechanical polishing, the conductive metal,                
          barrier layer and dielectric layer, thereby defining a conductive           
          wire which is connected by a via to a lower conducting region               
          (col. 4, lines 51-63).  Chen does not disclose immersing the                
          wafer in a chemical agent to remove an amount of dielectric                 
          material sufficient to prevent or substantially reduce formation            
          and/or growth of Cu dendrites from the Cu lines into the                    
          dielectric layer.                                                           




               2 The Random House College Dictionary, supra note 1 at 1310.           
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