Appeal No. 2001-1955
Application 08/989,917
page 2 of the reply brief that McKinney does not show a single
delay stage as a first delay stage of the claim being "connected"
to both the input terminal and the output terminal of a delay
tuning circuit.
At the outset, it is apparent to us that appellants
considered claim 23 to recite only a single delay stage that is
respectively connected to the input and output terminal claimed
by the manner in which the claim is argued. They therefore
apparently concede that the claimed plurality of mutually
interconnected delay stages are met to the extent also recited in
claim 23 on appeal. The claim does not recite whether the
plurality of stages are connected in series or in parallel or any
manner in which they are interconnected. What appellants appear
to be arguing with respect to claim 23 and its single delay stage
that is argued is that there appears to no "direct connection."
Since this is not claimed, the claim is clearly met by a simple
inspection of the figure of McKinney. Each of the respective
labelled stages 1-N in McKinney's figure are clearly "connected"
to each other from an input on the left to an output on the
right. Additionally, the teachings of the plurality of stages
"stages 1-N" as labeled in McKinney encompass the teaching that
one or only one stage may be present in the overall circuit
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