Appeal No. 2001-2660
Application 09/392,341
Likewise, from our independent study of both references, we
can derive no independent motivation from them for the
combination. The examiner's reasoning of the combination at the
top of page 4 of the examiner's answer of achieving benefits
taught by Magee of eliminating the inherently mix-match of the
switching between the individual field effect transistors in
preventing erroneous operation of the half-latch of appellants'
prior art Figure 1 appears to us to be more conclusory than to
set forth a rationale within the art from the artisan to
appreciate. Moreover, the examiner's additional rationale
appears to recognize a certain identity of the structure of
appellants' disclosed invention represented in Figure 2 and the
latter portion of Magee's Figure 1, but this rationale indirectly
reflects the apparent prohibited hindsight analysis of the
examiner.
We also reverse the rejection of independent claims 1, 4, 5
and 8 on appeal for an additional reason. Each of these
independent claims on appeal in part recites that the "CMOS"
inverter comprise a "nMOSFET" transistor. The examiner's
rationale at page 3 of the answer wrongly asserts that prior art
Figure 1 shows a switching circuit comprising a CMOS inverter
within the block element 110 comprising such an "nMOSFET"
5
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