Appeal No. 2002-0498
Application No. 09/441,899
(a) forming a gate oxide layer;
(b) depositing gate material on the gate oxide layer;
(c) depositing a layer of silicon oxynitride on the gate
material;
(d) etching the layer of silicon oxynitride, the gate
material and the gate oxide layer to form a gate structure, a
silicon oxynitride region remaining on top of the gate structure;
(e) performing a wet chemical process to remove the silicon
oxynitride region from the top of the gate structure, the wet
chemical process removing the silicon oxynitride region by
selectively etching the silicon oxynitride region; and
(f) after performing the wet chemical process, forming
spacers around the gate structure.
The examiner relies upon the following references as
evidence of obviousness:
Lin et al. (Lin) 5,883,011 Mar. 16, 1999
Cheung et al. (Cheung) 5,891,784 Apr. 06, 1999
Stanley Wolf Ph.D. et al. (Wolf), 1 Silicon Processing for the
VLSI Era 534-35 (Lattice Press, California 1990)
Appellants' claimed invention is directed to a method for
forming a transistor gate structure which comprises, inter alia,
selectively etching, by way of a wet chemical process, the
silicon oxynitride region from the top of a gate structure.
Appealed claims 1-3, 6-10, 13-16, 19 and 20 stand rejected
under 35 U.S.C. § 103 as being unpatentable over Lin in view of
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