Appeal No. 2003-0626
Application No. 09/410,896
1. A cooling stage for a semiconductor substrate
comprising:
a pedestal having a substantially planar top
surface,
a first plurality of circular grooves
concentrically formed in said top surface, and
a second plurality of linear grooves formed in
radial directions emanating from a center of said top
surface in fluid communication with each and everyone
of said first plurality of circular grooves allowing a
cooling fluid to flow therethrough when said
semiconductor substrate is positioned on said top
surface of the pedestal, said first plurality of
circular grooves and said second plurality of linear
grooves each having a width between about 1 mm and
about 7 mm, and a depth between about 1 mm and about 7
mm.
16. A wafer pedestal effective for cooling a high
temperature processed wafer comprising:
a wafer pedestal having a substantially planar top
surface,
at least three circular grooves concentrically
formed in said top surface, and
at least two linear grooves formed in radial
directions emanating from a center of said top surface
in fluid communication with each and everyone of said
at least three circular grooves for flowing a cooling
fluid therethrough cooling said high temperature
processed wafer positioned thereon.
The references relied upon by the examiner are:
Flanigan et al. (Flanigan) 6,081,414 Jun. 27, 2000
Moslehi 6,138,745 Oct. 31, 2000
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