Ex Parte Fukuda - Page 5




          Appeal No. 2003-1690                                                        
          Application 09/635,061                                                      


          was expected that a significantly better dielectric strength                
          would be exhibited for this structure.  However, the resulting              
          dielectric strength was only marginally better than that of                 
          device 110” (col. 3, lines 4-9).                                            
               In Ipri’s disclosed prior approach to improving dielectric             
          strength relied upon by the examiner (answer, page 5), a silicon            
          dioxide layer (417) was formed by thermally oxidizing the surface           
          of a silicon island (416), and a layer of silicon nitride (419)             
          was deposited over that layer and over the exposed portions of              
          the wafer surface (414) to provide the desired gate dielectric              
          thickness (T, figure 4) on the silicon island (col. 3, line 53 -            
          col. 4, line 1).  Ipri teaches that “[a]lthough the structure 410           
          [formed by the prior art process relied upon by the examiner]               
          also presents an improvement in dielectric strength compared to             
          the devices 110 and 210, “it is inherently more unreliable due to           
          the presence of a gate dielectric which comprises two dissimilar            
          materials” (col. 4, lines 4-8).2                                            

               2 Ipri’s approach to improving the dielectric strength is to           
          form a silicon island on an insulating substrate, thermally                 
          oxidize the surface of the silicon island to form a silicon                 
          dioxide layer thereon, depositing a silicon layer on the oxidized           
          island and the exposed portion of the substrate surface, and                
          oxidizing the entire silicon layer to form a silicon dioxide                
          layer that covers the island and the exposed wafer surface                  
          (col. 4, lines 28-55; figures 5A-E).                                        
                                          5                                           





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