Appeal No. 2003-1367
Application No. 09/640,237
depositing a first barrier layer over said substrate;
planarizing said first barrier layer;
forming a first opening through said first barrier layer to expose a portion of said active region;
filling said first opening with a first conductive material to form a contact plug;
forming an individual conductive contact land over said contact plug, said individual conductive
contact land covering only a single contact plug;
depositing a second barrier layer over said first barrier layer and said individual conductive
contact land;
forming a second opening though said second barrier layer to expose a portion of said individual
conductive contact land; and
filling said second opening with a second conductive material to form said contact.
8. A method of producing a bipolar transistor for the dissipation of electrostatic discharges,
comprising:
providing an intermediate structure comprising a substrate having at least one thick field
oxide area, and at least one active area including at least one implanted drain region,
and at least one implanted source region, said intermediate structure further including
at least one transistor gate member spanned between said drain region and said source
region on said substrate active area;
depositing a first barrier layer substantially covering said at least one field oxide area, said at
least one active area, and said at least one transistor gate member;
planarizing said first barrier layer to expose said at least one transistor gate member;
patterning a first etch mask on said first barrier layer, wherein said first etch mask includes
openings substantially over said at least one drain region and over said at least one
source region;
etching said first barrier layer to expose said at least one drain and said at least one source
region in said substrate forming at least one drain via and at least one source via,
respectively;
removing said first etch mask;
depositing a layer of first conductive material over said etched first barrier layer to fill said at
least one drain via and said at least one source via;
planarizing said first conductive material forming at least one drain contact plug and at least
one source contact plug in said at least one drain via and said at least one source via,
respectively;
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