Ex Parte WISE - Page 4




              Appeal No. 2003-1544                                                                                       
              Application No. 09/126,171                                                                                 


                     The examiner then turns to Schoner for a teaching of a                                              
                     decoder (114 of fig. 8) for decoding a B-frame that is considered                                   
                     as a single frame in a first decoding set of lines that are considered                              
                     as odd lines of a first field (odd field) and a second decoding set of                              
                     lines that are considered as even lines of a second field (even field)                              
                     (col. 9, lines 60 through col. 10, lines 1-9), and a pointer table in                               
                     FIFO Buffers (116 of fig. 8) for distributing incoming data to any                                  
                     available memory location in buffer, the address of the memory                                      
                     location being stored in the pointer table. (answer-page 5).                                        
                     The examiner then concludes, from these teachings of Hoogenboom and                                 
              Schoner, that it would have been obvious to incorporate the decoder and pointer table                      
              of Schoner into the decoding system of Hoogenboom “for [the] same purpose of                               
              decoding the single frame twice and pointer is distributing incoming data to any                           
              available memory location FIFO buffers” (answer-page 5).  The examiner suggests that                       
              the artisan would have been led to make this combination so as to “reduce the memory                       
              requirements of the decoder as much as possible to reduce its size and cost” (answer-                      
              page 5), citing column 5, lines 28-30, of Schoner.                                                         
                     Appellant takes the position that the examiner has failed to present a prima facie                  
              case of obviousness in that there is no reasonable expectation of success for the                          
              suggested combination.  In particular, appellant contends that no evidence has been                        
              provided for where in the processor 20 of Hoogenboom the decoder 114 and buffer 116                        
              of Schoner would be inserted.                                                                              




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