Ex Parte Yew et al - Page 2



          Appeal No. 2005-2530                                                        
          Application No. 10/612,129                                                  
          using a preactivated polymer adhesive layer in a variety of                 
          different semiconductor chip scale (SCS) packages.                          
               Representative independent claim 1 is reproduced as follows:           
          1.   A semiconductor device comprising:                                     
                    an integrated circuit chip having an active and a                 
               passive surface, said active surface                                   
                    including a protective polymer layer having been                  
               preactivated to impart adhesiveness, and at least one                  
               bonding pad;                                                           
                    an electrically insulating substrate having first and             
               second surfaces;                                                       
                    a plurality of electrically conductive routing strips             
               integral with said substrate;                                          
                    a plurality of contact pads disposed on said first                
               surface of said substrate, at least one of said contact pads           
               electrically connected with at least one of said routing               
               strips;                                                                
                    said second surface of said substrate being directly              
               attached to said preactivated polymer layer; and                       
                    bonding wires electrically connecting said at least one           
               bonding pad to at least one of said contact pads.                      
               The prior art references of record relied upon by the                  
          Examiner in rejecting the appealed claims are:                              
                                    U.S. Patents                                      
               Lupinski et al. (Lupinski)    5,300,812      Apr. 5, 1994              
               Lee et al. (Lee)              6,013,946      Jan. 11, 2000             
                                                  (filed Mar. 31, 1997)               
                           Japanese Published Application                             
               Hiroshi                       06-029454      Feb. 4, 1994              
                                          2                                           




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