Ex Parte Yew et al - Page 6



          Appeal No. 2005-2530                                                        
          Application No. 10/612,129                                                  
          non-conductive adhesive layer 142 (col. 4, lines 55-59).                    
          Lupinski, on the other hand relates to using a plasticized                  
          polymer useful as a low temperature laminating adhesive for                 
          circuit manufacturing (abstract, col. 1, lines 6-8).  As depicted           
          in the Figure, Lupinski laminates an overlay dielectric layer 50            
          to substrate 10 having IC chip 30 attached thereon using a                  
          plasticized polyetherimide composition 40 in order to provide               
          void free adhesive bonding at low temperature (col. 2, lines 9-             
          18).                                                                        
               Based on our findings above, we disagree with Appellants’              
          arguments and conclusion that the combination is improper since             
          the substrate disclosed by Lupinski has no relationship to                  
          contact pads.  Both references are concerned with using an                  
          adhesive for attaching an insulating substrate to the active                
          surface of a semiconductor chip.  Specifically, as argued by the            
          Examiner (answer, page 8), the polymeric adhesive disclosed by              
          Lupinski provides void free adhesive bonding in a low temperature           
          process.                                                                    
               We also remain unconvinced by Appellants’ argument that                
          Lupinski needs to show that insulating layer 50 includes                    
          conductive strips and contact pads on the surface to be bonded              
          with the active surface of an integrated circuit chip for a                 

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