Appeal No. 2005-2284
Application No. 09/748,589
structure of the claimed invention but for the ECC circuitry
carried by a support element) by Leedy, appellants’ major argument
against the rejection focuses on an alleged impropriety of
modifying Leedy by either one of the primary reference disclosures.
Thus, appellants’ arguments are not commensurate with the rejection
set forth by the examiner and, as such, we find this line of
argument unconvincing of nonobviousness of the instant claimed
subject matter.
There is a big difference between the examiner’s rejection
rationale, modifying the three-dimensional memories of Zhang and
Johnson to include ECC circuitry on a support element, based on a
teaching of a third reference indicating that there is an advantage
to having the capability to error check and correct, as proposed by
the examiner, and the rejection apparently perceived by appellants
wherein the teaching of ECC circuitry on a support element is
somehow modified to include a memory array structure and method
recited in claims 126 and 130.
At footnote 2 on page 7 of the brief, appellants finally come
around to arguing the rejection as set forth by the examiner, in
arguing that it would not have been obvious to add ECC circuitry to
the memory arrays of Zhang and Johnson in order to benefit from
error-correction capabilities because “ECC circuitry adds delays
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