Appeal No. 2006-1049
Application No. 09/667,826
subtract (or add) charge from the sample and hold capacitor. It will be
appreciated by those skilled in the art that the offset switch 230 is held
closed a sufficient time to allow the voltage at node 222 to settle.
45. As still further shown in FIG. 3B (col. 13, line 64 through
col. 14, line 6):
[T]he offset correction circuit 220 receives control signal S-RST
provided along line 134 to reset switch 232. Reset switch 232 serves
to discharge (or precharge) capacitors 224 to the offset reference
voltage VR prior to coupling the offset correction circuit 220 to node
222. The reset is primarily necessary to remove any residual charge
from capacitors 224 in situations where circuit 220 is shared between
plural readout cells or to reset these capacitors and remove any
residual charge from the previous sample of the detector voltage.
46. Referring to FIG. 7, the corresponding discrete offset corrections
provided by 10 distinct offset correction coefficients for 10 consecutive pixels in a
row of the focal plane array are illustrated (col. 16, lines 10-13).
47. Referring to FIG. 10, an alternate embodiment of the offset correction
circuit 220 is illustrated, which employs a plurality of constant current sources 400
which are coupled in parallel and which are selectively connected to the node 222
(described above in relation to FIGS. 3B and 3C) by switches 228 (col. 16,
lines 46-51).
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Last modified: November 3, 2007