Ex Parte Cannata et al - Page 14



              Appeal No. 2006-1049                                                                                       
              Application No. 09/667,826                                                                                 

                     33. A sample and hold capacitor 212 is then charged to the sample value                             
              of the microbolometer voltage VD.  This held voltage is then provided as the output                        
              of the readout cell indicated as Vout on line 214 in FIG. 3A (col. 12, lines 55-59).                       
                     34. Referring to FIG. 3B, the readout cell 100 is illustrated employing                             
              offset correction circuitry for compensating for nonuniformities in the detector                           
              elements in the array of FIG. 2.  The readout circuitry of FIG. 3B common to that                          
              of FIG. 3A operates in the manner described above and a detected voltage VD is                             
              provided at node 210 as described above (col. 12, lines 60-65).                                            
                     35. Applicants state that voltage VD will vary from pixel to pixel even for                         
              a uniform scene and uniform IR input to all the microbolometer elements 200 due                            
              to inherent nonuniformities in processing of the microbolometer array (col. 12,                            
              line 66 through col. 13, line 2).                                                                          
                     36. In the present invention, such nonuniformities are compensated for by                           
              offset correction circuit 220 which is coupled to node 222 and causes a suitable                           
              amount of charge to be subtracted from (or added to) sample and hold capacitor                             
              212 such that an offset corrected output voltage Vout is provided.  That is, the offset                    
              correction circuit 220 provides a corrected output voltage Vout at node 222 (col. 13,                      
              lines 2-8).                                                                                                
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