Ex Parte Lin et al - Page 7




         Appeal No. 2006-1204                                                       
         Application No. 10/379,006                                                 
                                                                                   
              At page 15, lines 5-16, Appellants’ specification states:             
                   The package 200 typically includes the synchronous               
                   circuit 260 to synchronize one or more internal clock            
                   signals to an external clock signal.  The internal               
                   clock signals may, in various alternative embodiments,           
                   be clock signals used by the internal circuitry 205,             
                   the arbiters 235, the driver circuits 225, and any               
                   other desirable circuitry in the package 200.  For               
                   example, the synchronous circuit 260 may provide a               
                   synchronized clock signal 265 to the internal circuit            
                   205.  Examples of the synchronous circuit 260 include,           
                   but are not limited to delay-locked loops, phase-locked          
                   loops, and synchronous mirror delays. The synchronous            
                   circuit 260 monitors a phase difference between the one          
                   or more internal clock signals and the external clock            
                   signal and provides one or more adjustment signals in            
                   response to detecting the phase difference.  In one              
                   embodiment, the synchronous circuit 260 may provide a            
                   fine adjustment signal in response to detecting small            
                   phase differences and a coarse adjustment signal in              
                   response to detecting large phase differences.                   

             Further, at page 16, lines 5-17, Appellants’ specification             

         states:                                                                    
              Referring now to Figure 4, a flow chart illustrating one              
              embodiment of a process of calibrating the driver circuits            
              225 is shown.  In the illustrated process, a phase                    
              difference that may be indicative of an impedance mismatch            
              is detected (at 400) by a synchronous circuit 260, which              
              provides (at 410) the update signal 270 to the controller             
              230 in response to detecting (at 400) the phase difference.           
              In response to the update signal 270, the controller 230              
              determines (at 420) whether an impedance mismatch may be              
              present.  If the controller 230 determines (at 420) that no           
              mismatch is present, or that the impedance mismatch is small          
              enough that it is not desirable to change the impedance of            
              the driver circuit 225, the process ends (at 430).  If the            
              controller 230 determines (at 420) that the impedance                 
              mismatch is greater than a predetermined range of tolerance           
              values, a determination may be made that it is desirable to           
              change the impedance of the driver circuit 225 to reduce the          
              impedance mismatch.  The controller 230 then selects (at              
              440) one or more new impedances for the driver circuits 225.          

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