Appeal 2006-2571
Application 09/759,179
With respect to claim 3, dependent on claim 1, and the second ground
of rejection, the Examiner contends Whitesides does “not expressly disclose
feature size to be less than 1 µm,” and finds Maracas would have disclosed a
stamp with micron and submicron feature size (Answer 5; citing Maracas
col. 3, ll. 22-25 and col. 8, ll. 17-18). The Examiner concludes that “[a]s
feature size in integrated circuits is being required to be more and more
narrower it would have been obvious to one of ordinary skill . . . to make the
stamp of Hawker [sic, Whitesides] with sub micron feature size to be able to
pattern sub micron features” (id.).
Appellant contends the Examiner presents no evidence that
Whitesides’ teachings “could be further modified to include sub-micron
features” (Br. 8). Appellant argues Whitesides’ “teachings acknowledge the
resulting deformation of a stamp created and used in accordance with the
reference’s teachings. This deformation prevents spacing of apertures within
one micron as the deformation would destroy such spacing. See Figs. 3a-c
and Col. 10, lines 6-15” (id.).
The Examiner responds “[a]t Col 10 lines 6-15 [Whitesides] state that
the compressive force would deform and reduce feature size. This does not
mean that sub micron features may not be obtainable,” arguing “sub micron
feature size is obtained by design and not by using the stamp at high
compressive force thereby to deform the stamp” (Answer 8). Appellant
replies “[a] skilled artisan would not be motivated to modify [Whitesides’]
teachings to create an inoperable embodiment, e.g., the destruction of the
spacing due to deformation would render the stamp inoperable” (Reply
Br. 8).
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