Appeal 2007-0357
Application 10/180,862
Appellants’ contribution in the art appears to be expressed at the
bottom of page 2 of the Specification as filed as well as the bottom of page
29, essentially being the ability of the overall system to selectively connect
multiple devices such as modems. Some claims otherwise state this
capability as preventing a connection or as disconnecting. On the other
hand, we agree with the Examiner’s views that none of the claims on appeal
appear to distinguish over the normal functionality of the digital controller
taught in the Intel reference to selectively connect between a plurality of
multiple CODECs illustrated in figure 33 at page 75 of the Intel reference
and the additional showing in figure 35 at page 80 of the Intel reference,
both of which are relied upon by the Examiner in formulating the rejection.
To the extent independent claims 1, 10, and 12 recite a signal line
selecting ability of some kind, we agree with the Examiner’s basic position
that the applied prior art in Intel renders even this capability to be
unpatentable to Appellants. Each of independent claims 3, 5, 11, and 13
further recite the ability of the arithmetic portion to communicate with
signals sent from “any one of” a plurality of devices. This recitation does
not recite “only” one of the devices and clearly includes the capability of
plural devices. In any event it clearly does not recite a positive recitation of
a selectability anyway. The further recitation of a bridge in independent
claims 5 and 18 does not also render patentable the claimed subject matter
because it is inherent within the normal operability of such bridges to
selectively interconnect devices between and therefore act as a bridge
between plural busses/devices.
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