Appeal 2007-2701
Application 10/079,811
Appellants note the Examiner relies upon Hollander at column 8, lines 39-44
and column 10, lines 51-58 for the alleged teaching of “modeling operation
of said software component using a software simulator” (independent claim
1; see also the equivalent language recited in clause (i) of independent
claims 15 and 16). Appellants argue the cited column 8 discussion merely
relates to “[a] report generator module 24 [which] provides textual and
graphical information on the test results” (Hollander, col. 8, ll. 39-40).
Appellants note that the cited column 10 discussion deals with a “co-
verification extension module 174” (Hollander, col. 10, ll. 51-52).
Appellants conclude that the Examiner has failed to establish a prima facie
case of obviousness because at least the limitation of modeling the operation
of a software component using a software simulator is not fairly taught or
suggested by the proffered combination of Hollander and Platt (Br. 10-11).
The Examiner disagrees. The Examiner notes that Hollander teaches
a co-verification module that allows the simultaneous verification of a
software component and hardware component (see Hollander, col. 10, ll. 51-
58). The Examiner finds these two components make up the device-under-
test (DUT). The Examiner further notes that Hollander discloses the DUT
can be a complete system that comprises hardware having embedded logic
(see col. 6, lines 50-55). Thus, the Examiner finds the claimed “hardware
component” encompasses the hardware portion of Hollander’s DUT and the
claimed “software component” encompasses Hollander’s embedded logic in
the DUT (see claims 1, 15, and 16). The Examiner points to Hollander’s
Figure 1 that shows the entire DUT 38 is simulated by Simulator 38. The
Examiner contends that in order to simulate the entire DUT, Hollander’s
5
Page: Previous 1 2 3 4 5 6 7 8 Next
Last modified: September 9, 2013