Appeal No. 96-2379
Application 07/837,240
We agree with the examiner that it would have been obvious to one
with ordinary skill in the art to first hold or buffer the
resultant value in a register and then output the same. There is
no reason why one with ordinary skill in the art would perceive
that the resultant value must be provided directly from the adder
and cannot first be placed in an output register. The basic
skills of one with ordinary skill in the art would include such
common sense and logical reasoning. Indeed, even the appellant's
own specification describes and illustrates the use of output
registers by prior art dithering techniques (Figure 3).
The appellant argues that while the claimed invention
recites only a single adder, Comins makes use of two adders in
sequence. The argument is misplaced. The rejection on appeal is
one for obviousness, not anticipation. As is shown in Comins'
Figure 2, the carry bit from the output of the first adder 264 is
inputted to the second adder 265 which also take the more
significant bits of the calculated pixel value as input. From
the perspective of one with ordinary skill in the art, the two-
adder structure of Comins is equivalent to a single larger adder.
Logic dictates that adding the lower bits of a number to a value
in a first adder and then feeding the carry data to a second
adder which also takes as input the higher bits of the same
7
Page: Previous 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Next
Last modified: November 3, 2007