Appeal No. 95-0347
Application 08/056,681
(d) a channel region in said semiconductor layer
and between said source region and said drain
region and abutting said gate region;
(d) wherein said gate region has a doping level
where said gate region abuts said channel region
varying in the direction from said source region
to said drain region.
The recitation of two steps labeled "d" should be corrected
when this case returns to the jurisdicition of the examiner.
Opinion
We do not sustain the rejection of claims 1, 2, 4, 5, 7, 12
and 13 as being anticipated by Muraoka.
Anticipation is established only when a single prior art
reference discloses, either expressly or under the principles of
inherency, each and every element of the claimed invention. In
re Spada, 911 F.2d 705, 707, 15 USPQ2d 1655, 1657 (Fed. Cir.
1990); RCA Corp. v. Applied Digital Data Sys., Inc., 730 F.2d
1440, 1444, 221 USPQ 385, 388 (Fed.Cir. 1984). See also In re
King, 801 F.2d 1324, 1326, 231 USPQ 136, 138 (Fed. Cir. 1986);
Lindemann Maschinenfabrik GMBH v. American Hoist & Derrick Co.,
730 F.2d 1452, 1458, 221 USPQ 481, 485 (Fed. Cir. 1984). The
prior art reference must either expressly or inherently describe
each and every limitation in a claim. Verdegaal Bros. v. Union
3
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