Ex parte VASCHE - Page 2




          Appeal No. 96-1207                                                          
          Application No. 08/064,203                                                  

          between two conductive layers of the device.  In the method of              
          depositing the tunneling oxide, a silicon dioxide layer is                  
          formed by a low pressure chemical vapor deposition (LPCVD)                  
          process using tetraethylorthosilicate (TEOS).  After the                    
          tunneling oxide is deposited, it is subjected to an annealing               
          step.                                                                       
               Claims 13 and 14 are the only independent claims on                    
          appeal, and they read as follows:                                           
               13.  An improved tunneling region for use with an                      
          integrated circuit comprising:                                              
               a first layer of polysilicon;                                          
               a first electron tunneling layer of thermal oxide formed               
          over said first layer of polysilicon;                                       
               a second electron tunneling layer of annealed deposited                
          silicon dioxide formed over said first tunneling layer having               
          a thickness less than 2000 Angstroms thick, said silicon                    
          dioxide layer being formed by low pressure chemical vapor                   
          deposition comprising the use of tetraethylorthosilicate; and               
               a second layer of polysilicon formed over said layer of                
          deposited silicon dioxide, such that when a bias voltage is                 
          applied between said first layer of polysilicon and said                    
          second layer of polysilicon, electron tunneling will occur                  
          from said first layer of polysilicon to said second layer of                
          polysilicon through said first and second electron tunneling                
          layers.                                                                     
                                                                                     
               14.  A semiconductor device including means for electron               
          tunneling, comprising:                                                      
               a first conductive layer;                                              
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