Appeal No. 1996-3391 Page 9
Application No. 08/160,573
ALU operation block 496, and lines 54-56 of column 46 of Chu
discloses that the signals on the R and S-operand inputs of the
ALU are “used to perform the arithmetic and/or logic
operations...,” this would appear to suggest that, indeed,
there would be no fixed order of operation between the Boolean
functions and the arithmetic combinations.
Thus, in our view, the examiner has established a prima
facie case of obviousness, with regard to independent claims 1
and 12, which has not been overcome by any objective evidence
or arguments presented by appellants. Accordingly, we will
sustain the rejection of claims 1, 5 through 8, 10 through 12,
16 through 19 and 21 through 37 under 35 U.S.C. 103.
Turning now to claims 2, 3, 13 and 14, claims 2 and 13
recite that the shifter performs a right shift or a left shift
based on the digital state of a predetermined bit of the shift
control signal. Claims 3 and 14, depending from claims 2 and
13, respectively, recite that the predetermined bit is the most
significant bit of the shift control signal. At pages 4-5 of
the final rejection (Paper No. 7), the examiner has provided a
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