Appeal No. 2001-2351
Application No. 08/772,443
that the purpose and functionality of a cache is to accelerate
the speed of an activity by storing instructions/data that are
likely to be required by a processor multiple times. In
contrast, appellants contend a buffer is simply a temporary
storage for slowing down the I/O from one device to match the I/O
speed of another device.
Appellants urge that even if it were true that a cache and a
buffer are equivalents, the reference does not anticipate the
disclosed invention because it requires data to be passed through
a buffer, i.e. data FIFO 504.
The examiner’s position with respect to appellants’ first
argument is that several publications were cited at pages 3-5 of
the final rejection to establish that a buffer is equivalent to a
cache memory. With respect to the second of appellants’
arguments, the examiner asserts to the effect that the data in
Parks transfers from the bus 326 to the host 303 without
requiring transfer of the data “using” (claim 1) the local memory
(buffer) 324.
We will not sustain the rejection of claims 1, 4, 9, 20 and
31 as anticipated by Parks. We do not agree with the examiner’s
position to the effect that the local memory 324 of Parks is a
buffer. Memory 324 of Parks is disclosed as a cache memory, not
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