Ex Parte GOVER et al - Page 8




          Appeal No. 1999-0288                                                        
          Application No. 08/538,071                                 Page 8           


               The examiner asserts (final rejection, page 6) that "Wibecan           
          does not specifically show determining a logic level for a bit in           
          a machine state register, and determining the logic levels for a            
          bit set of a second MMCR."  The examiner (id.) once again notes             
          that Brantley teaches the use of a register which controls the              
          operation of the counting operations, and argues that “[i]t would           
          have been obvious to one [of] ordinary skill in the art to                  
          utilize a hardware based register to house the controlling                  
          indicators for the counting operations performed by Wibecan’s               
          counting functions, because it would allow Wibecan’s system to              
          have a hardware based performance monitoring option, which would            
          complement the software based monitoring functions which operate            
          in a similar manner.  This would allow a user to control the                
          counters using a control register, via setting bits in hardware             
          register, rather than doing so in a data structure in a software            
          routine, which gives a user versatility in controlling the                  
          monitoring session.... [o]ne of ordinary skill in the art would             
          have recognized this relationship and incorporated the varying              
          ways of controlling the counters in Wibecan’s system in order to            
          give the system additional versatility in controlling the                   
          counting services provided by the monitoring system.  Although              









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