Appeal No. 2004-0550
Application No. 09/802,201
remove the shortcomings of Rajkanan since Lee discloses the use
of p+ polysilicon gate MOS capacitors for the purpose of making
basic measurements of the characteristics of the gate oxide but
is silent as to whether the source/drain regions are intended as
p-type or n-type (Brief, page 6).
Appellants’ argument is not persuasive. The examiner finds
that Lee discloses that the p+ polysilicon gate MOS capacitors
were formed in the n-well region (col. 2, ll. 36-38), thus
suggesting to one of ordinary skill in this art that the Lee
capacitor would have n-type source/drain regions (Answer, page
13). The examiner submits that the teachings of Rajkanan further
support this suggestion by teaching that MOS capacitors 100"
formed in a n-well 104-1 have n-type source/drain regions 112-1
and 112-2 (id.). In light of these uncontested findings, we
agree with the examiner that Lee would have suggested a p+ type
polysilicon gate MOS capacitor with oppositely doped n-type
source/drain regions to one of ordinary skill in this art.
Appellants argue that Draper is “teaching away” from the
claimed invention since Draper discloses a p-type gate in
conjunction with a p-type source/drain and an n-type gate in
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