Appeal No. 2006-2525
Application No. 10/178,672
subject matter as a whole of instant claim 3 would have been obvious to one skilled in
the art because Leipold teaches a patterned low resistivity layer within the requirements
of the claim for the purpose of preventing undesirable latch-up effects in CMOS devices
such as those taught by Celler.
Appellants submit that the rejection errs because Leipold teaches that the buried
layer must be formed under all the active devices but not formed under any of the
passive devices, referring to column 2, lines 26 through 28 of the reference. As such, in
appellants’ view, Leipold teaches that active devices must be formed over the patterned
low resistivity buried layer (Brief at 4.) According to appellants, a combination of Celler
and Leipold would require that the buried layer be under the active RF devices;
otherwise, the teachings of Leipold would be destroyed. Leipold requires the buried
layer to be under all of the active devices to prevent any latch-up effects, referring to
column 2, lines 27 through 30. (Id. at 5.) Appellants further contend that the digital
CMOS circuits 12, depicted in Figure 1 of the reference, are only examples of active
circuits, referring to column 2, lines 20 through 22. As such, the digital CMOS circuits
12 represent all active devices. Appellants again note that Leipold teaches forming the
buried layer “under the active components” to prevent a latch-up effect, referring to
column 2, lines 26 through 30. (Id. at 6.)
The examiner responds that nowhere does Leipold state that the buried layer
must be formed under all the active devices. According to the examiner, Leipold’s
teachings with respect to the conductive layer relate to latch-up effects, which are
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