Appeal 2006-0016
Application 10/347,536
processors being prohibited from gaining ownership of said
cache line during said processing of said Read transaction,
wherein Read-Read deadlocks are prohibited, by teaching in
column 6, lines 42-51, a FORWARD-EXCLUSIVE state
wherein the data block is present in exactly one cache memory
and is modified.
(Answer 4.) The Appellants argue, "Donaldson does not describe blocking
transactions that collide with the Read transaction from being received by
the processor during processing of the Read transaction. Donaldson teaches
stopping the processing of new read commands, not blocking transactions
from being received." (Reply Br. 3.) They further argue that "the
combination of Donaldson and Arimilli does not render Appellant's claims
unpatentable because Arimilli does not cure the deficiencies of Donaldson."
(Reply Br. 3.) Therefore, the issue is whether Donaldson blocks colliding
transactions from being received by a processor that requested a Read
transaction.
In addressing the issue, the Board conducts a two-step analysis. First,
we construe independent claims at issue to determine their scope. Second,
we determine whether the construed claims are anticipated.
A. CLAIM CONSTRUCTION
"The Patent and Trademark Office (PTO) must consider all claim
limitations when determining patentability of an invention over the prior
art." In re Lowry, 32 F.3d 1579, 1582, 32 USPQ2d 1031, 1034 (Fed. Cir.
1994) (citing In re Gulack, 703 F.2d 1381, 1385, 217 USPQ 401, 403-04
(Fed. Cir. 1983)).
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