Ex Parte Baker et al - Page 7


               Appeal 2007-0939                                                                             
               Application 10/931,274                                                                       
               motor. Appellants further argue that the language of claims 8 and 16 requires                
               the output to be delivered to the second transformation block (Br. 5).                       
                      The Examiner disagrees.  The Examiner points to signal J1, i.e., the                  
               output of position sensor 2, fig. 1.  The Examiner further points to output                  
               signal “θ1” from block 21b, i.e., where signal “θ1” is the output of the                     
               ARCTAN function shown in fig. 8 (Answer 6).                                                  
                      We note that Kojima discloses a summation block (i.e., subtractor 16,                 
               fig. 1) that receives a first “θ1” signal from “PHASE CORRECTION                             
               SETTING CONTROL UNIT 49” and a second “Th” signal from “PHASE                                
               COMPUTING UNIT 9” (fig. 1), as follows:                                                      
                      Still further, numeral 9 denotes a phase computing unit for                           
                      performing an operation of an electric angular phase (Th) of the                      
                      rotor on the basis of the position output (J1) of the absolute                        
                      position detector 2, with this electric angular phase (Th) being                      
                      indicative of a rotational angle in the d-q axis coordinate system                    
                      viewed from an α–β where the phase axis coincides with the u                          
                      phase axis of the three phases.                                                       
                      (col. 1, l. 66 through col. 2, l. 5).                                                 

                      We note that the output of the summation block (i.e., subtractor 16,                  
               fig. 1) is provided as an input to “TWO-PHASE / THREE PHASE                                  
               CONVERTER 4” (i.e., the output of the summation block is delivered to the                    
               second transformation block).  (See also Kojima, col. 6, ll. 29-33).                         
               Therefore, we agree with the Examiner that the language of claims 8 and 16                   
               broadly but reasonably reads on Kojima’s disclosure.  Because we find that                   
               Kojima discloses all that is claimed, we will sustain the Examiner’s rejection               
               of claims 8 and 16 as being anticipated by Kojima.                                           



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