Appeal 2007-3623
Application 10/035,747
STATEMENT OF CASE
Appellant appeals under 35 U.S.C. § 134 from a Final Rejection of
claims 1-54. We have jurisdiction under 35 U.S.C. § 6(b).
Appellant invented systems and methods for performing floating point
arithmetic computations, and more particularly systems and methods for
performing floating point computations which use an enhanced format for
the floating point operand. (Spec. [001]).
Representative independent claims 1 and 33 under appeal read as
follows:
1. A floating point operand data structure used in floating point
computations and processing within a processing device, comprising:
a first portion of the data structure having floating point operand data;
and
a second portion of the data structure having embedded status
information associated with at least one status condition of the floating point
operand data.
33. A method of encoding a floating point operand with status
information without maintaining the status information in a floating point
status register, comprising:
determining a status condition of the floating point operand as part of
processing the floating point operand in association with a floating point
operation; and
representing an updated status condition of the floating point operand
within the floating point operand.
The Examiner separately rejected claims 1-54 under 35 U.S.C.
§ 102(b) based on two patents.
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