Appeal No. 96-0905
Application No. 08/116,950
we agree with appellants’ last argument that the lead processor
of Kolb receives the interrupt request and executes it as soon as
it is sent at some random virtual time, and not at a
preselected/selected time, the instant claims are not so limiting
as to distinguish over Kolb in this regard. Since the claims are
open-ended, i.e., the multiple CPU system “comprising”..., the
“plurality” of CPUs recited in the claims need not include the
lead processor as in Kolb but may very well include all of the
processors of Kolb but for the lead processor.
We find the examiner’s approach of interpreting the virtual
time used to interrupt the lagging processors in Kolb as a
“preselected” or “selected” count to be sound. We also find that
each of the independent claims, in one form or another, requires
that each of the CPUs has an interrupt circuit and a counter and 2
that the interrupt circuit is responsive to an external interrupt
2While the language of claim 1 (“said CPUs having an
interrupt circuit”) and claim 3 (“an interrupt circuit connected
to all of said CPUs”) might, at first glance, be interpreted as
permitting a single, separate interrupt circuit coupled to each
of the CPUs, it is clear from the disclosure, e.g., page 17, line
25 and Figure 2, that each of the CPUs has an interrupt circuit
65. This, coupled with appellants’ similar interpretation, or
admission, at page 5, fourth line up from the bottom, of the
reply brief, that the language of the claims mean that “each of
the CPUs contains the recited interrupt circuit” would make any
other interpretation unreasonable, in our view.
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