Appeal No. 96-0905
Application No. 08/116,950
request occurring at any time. It is also required that the
interrupt circuit and counter be coupled so that the interrupt
circuit is also responsive to a selected, or preselected, count
in the counter for separately interrupting each CPU at an
identical instruction execution cycle. Accordingly, even the CPU
which may be leading is also subject to the selected, or
preselected, count determining when that CPU will be interrupted.
In Kolb’s system, specifically the second embodiment relied on by
the examiner, the lead processor appears to receive the interrupt
request immediately and to service that interrupt at any random
time the interrupt request is made. The lead processor then
proceeds in the program although the specific location in the
program at the time of the interrupt is stored so as to be used
by the lagging processors in order to interrupt at the same
virtual time within the program. Therefore, as appellants’
argument goes, since the instant claims require that each of the
CPUs must be interrupted in accordance with the preselected, or
selected, count and Kolb’s leading processor is clearly not
interrupted in accordance with such a count, nor is there any
evidence as to why it would have been obvious to modify Kolb in
any manner to achieve such (and Kreis adds nothing in regard to
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