Appeal No. 1997-2160
Application No. 07/548,709
Appellants contend that this difference is brought out in the recitation of a “static scheduler” because the
static scheduler partitions the instructions of a single routine between the CPU and the DSP.
We disagree with appellants and hold that Yamazaki clearly discloses a static scheduler in that
the DSP in Yamazaki is scheduled to process fonts, under the condition that the required font is not in
the CPU-addressed cache (working area 2A in memory – see Figure 2 of Yamazaki), while the CPU
handles all other processing requirements. Accordingly, Yamazaki schedules each of the CPU and
DSP to different tasks and these tasks are assigned in a predetermined manner. Since it has been
determined beforehand as to what jobs the DSP will handle (font processing) and what jobs the CPU
will handle (all other processing), it is clear to us that what Yamazaki has disclosed is a “static
scheduler.” Clearly, Yamazaki does not “dynamically” determine which processor will handle which job
based on what went on before. On the contrary, Yamazaki determines, in a predetermined manner,
i.e., statically, which processor is to handle which job. Thus, Yamazaki does disclose a static scheduler,
as claimed.
However, claims 1 and 30 also require that the scheduling means transmit “non-maskable
interrupts to said cpu non-maskable input…” [claim 1] or transmit “interrupt signals to said cpu non-
maskable interrupt input” [claim 30]. It is this claimed limitation that we do not find disclosed or
suggested in the applied references.
The examiner contends that the claimed transmission of “non-maskable interrupts” is “nothing
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