Appeal No. 1997-2160
Application No. 07/548,709
more than handshake signals between two processors” [Page 8-principal answer], that Yamazaki
discloses communication between the CPU and the DSP, at column 7, lines 44-46, and that whether or
not a handshake is maskable is dependent on the importance of the job to be processed. It appears to
us that the examiner misses the point. The language of claims 1 and 30 requires the non-maskable
interrupts to be transmitted “to said cpu.” This means that it is the CPU, in the instant invention, which
is being controlled, i.e., the CPU would be the slave in a master/slave relationship. In Yamazaki, it is
the CPU that takes precedence and does the controlling. We find nothing within the disclosure of
Yamazaki, or of Tokuume for that matter, which suggests that any non-maskable interrupt signals are
sent to the CPU.
Accordingly, we will not sustain the rejection of claims 1 and 30 under 35 U.S.C. § 103 and, as
a consequence, we also will not sustain the rejections of claims 2 through 9, 22 and 23, dependent
thereon. With regard to claim 7, we do not find that Ino provides for the deficiencies noted above with
regard to a lack of teaching the claimed transmission of non-maskable interrupts to the CPU by
Yamazaki and Tokuume.
With regard to independent claim 26, we will sustain the rejection of this claim under 35 U.S.C.
§ 103 because it does not contain the limitation of a transmission of a non-maskable interrupt to the
CPU. Appellants’ only argument, regarding the rejection of this claim, is that the applied references do
not suggest the claimed “scheduling means for statically scheduling execution of the signal processing
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