Appeal No. 2003-1365
Application No. 09/376,659
Appellants’ invention is directed to a method of fabricating
semiconductor memory devices while reducing mobile ion migration
into transistor gate sides during semiconductor manufacturing.
After the gate stacks, which includes a control gate and a
floating gate, the subsequent processing steps cause mobile ions
and/or other process-induced charges migrate into the sides of
the floating gate and alter the electrical characteristics of the
device (specification, page 2). According to Appellants, the
gate stacks are covered with a first protective layer which is
partially etched away to expose the intended source regions and
to allow dopants be implanted into the source regions
(specification, page 2). A second protective layer is then
deposited onto the first layer and partially etched away to
expose the intended drain regions and allow dopants be implanted
into the drain regions (id.). Subsequent manufacturing steps may
be carried out while the first and the second protective layers
protect the sides of the gate stacks from ion migration into the
floating gate area (id.).
2
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