Appeal 2006-1454
Application 09/004,524
Patent 5,483,421
8. The invention can be understood by reference to Figures 1 to 4 of the
drawings, all of which are reproduced in Appendix 1 of this opinion.
9. Figure 1 is a longitudinal section view, somewhat diagrammatic,
showing the connection of a ceramic chip carrier 10 to a glass filled epoxy organic
circuit board card 12, conventionally (FR-4) glass-epoxy, by means of solder ball
connections, and depicting the stress pattern generated at elevated temperature due
to thermal mismatch (col. 3, ll. 47-51).
10. Figure 2 is a graph plotted to depict the relative deformation of a
circuit board card and ceramic module under thermal stress showing the average
normal strain in each solder ball connection mismatch (col. 3, ll. 52-55).
11. Figure 3 is a graph showing the relative shear displacement between a
circuit board and a ceramic module showing strain in the planar direction between
the board and module and the average shear strain in each solder ball (col. 3,
ll. 56-60).
12. Figure 4 is an exploded perspective view showing the mounting of
chips 20 onto a carrier 24 and carrier onto a circuit card (circuit board 38)
according to the present invention (col. 3, ll. 61-63).
- 6 -
Page: Previous 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Next
Last modified: September 9, 2013