Appeal 2007-2460
Application 10/709,179
ASE argues that Ono describes its chip as located on an area
other than where the semiconductor chip 15 is mounted. (Appeal Br.
at 6 and Reply Br. at 8). The backside of Ono’s chip 15 has a
projection. The chip projection is identified as “mounted” on the first
dielectric layer 12 and not the second interconnect 14. Yet, the non-
projected portion on the backside of Ono chip 15 is placed on top of
the second interconnect and ASE’s claims do not require a bump pad
extending across the entirety of the backside of the chip.
We AFFIRM the Examiner’s rejection of claims 15, 16 and 18 over
Ono.
ii. The Rejection of Claims 17 and 19 under 35 U.S.C. § 103(a) as
being unpatentable over Ono as applied to claims 15-16 and further in
view of Akram
ASE identifies claim 15 as representative of claims 17 and 19. Yet, in
addition to providing arguments with respect to claim 15, ASE comments
that claim 17 differs from the teachings of Akram. ASE claim 17 depends
from claim 15 and generally requires putting a mask on the backside of the
chip, forming a metallic layer on the mask and removing the mask so that
the remaining metallic layer on the backside of the chip becomes a bump
pad.
ASE states that Akram describes the steps of forming a protective
layer after bumps have been formed as opposed to before. ASE does not
state that the differences between Akram and claim 17 are unobvious.
(Appeal Br. at 7-8). Further, as noted by the Examiner, the selection of any
order of performing process steps is prima facie obvious in the absence of
new or unexpected results. In re Burhans, 154 F.2d 690 (CCPA 1946); In re
14
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