Appeal No. 96-0033
Application 08/066,638
Furthermore, as said by the examiner at page 10 of the answer,
there is nothing in appellants’ claims to preclude that a first
rate from a first device may be variable, as is taught in Trost,
or to preclude that this rate may be externally provided to the
overall device.
Appellants’ positions presented between pages 11 and 13 are
also non-persuasive since they appear to argue the disclosed
rather than the claimed invention. As to appellants’ position
at page 13 of the brief, there is no claimed burst mode of the
first device recited in any independent claim on appeal. There
is only an implication or an inference that may be derived from
the language of the register means clause that something other
than a maximum number of data entities may be transferred within
consecutive clock periods at other times. Even as disclosed,
appellants’ memory device 1 does operate in at least two speeds,
a normal speed and a burst mode speed. As set forth at columns 1
and 2 of Trost, the dynamic memory of this reference embodied as
element 10 contains the capability of operating at two speeds, a
fast and a slow speed, even as depicted in the Figure 7 and
discussed at column 5, lines 54 to 59. A CCD memory device of
Trost has the capability of operating in an internal clock sense
between minimum and maximum data clock rates. As such, the fact
6
Page: Previous 1 2 3 4 5 6 7 8 9 10 11 Next
Last modified: November 3, 2007