Appeal No. 96-1620
Application No. 07/938,288
a first register for storing and reading data;
a read-only memory storing microprocessor ID data including data fields that
identify the microprocessor type;
a decoder for receiving and decoding an ID instruction; and
control circuitry coupled to the first register, the read-only memory and the
decoder, including ID instruction execution means responsive to a decoded ID instruction
including for executing the ID instruction received from the decoder, including reading the
microprocessor ID data from the read-only memory and storing said microprocessor ID
data in the first register.
The examiner relies on the following references:
Durst, Jr. et al. 5,113,518 May 12, 1992
(Durst)
Kurihara et al. 5,121,486 Jun. 9, 1992
(Kurihara)
Claims 1 through 26 stand rejected under 35 U.S.C.
' 103. As evidence of obviousness, the examiner cites
Durst with regard to claims 1 through 8, adding Kurihara
with regard to claims 9 through 26.
Reference is made to the briefs and answer for the
respective positions of appellants and the examiner.
OPINION
2
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