Appeal No. 96-2950
Application 08/145,710
timing control means responsive to the potential at said
predetermined node for controlling an increasing rate of a
conductance of said first field effect transistor, and
said current increasing rate control means controlling the
output driver circuit to operate in at least a first state and a
second state, said current providing means provides a first
current increasing rate in the first state and said current
providing means provides a second current increasing rate in the
second state, said second current increasing rate being slower
than said first current increasing rate.
The references relied on by the Examiner are as follows:
Davis 4,961,010 Oct. 2, 1990
Kohda 5,003,205 Mar. 26, 1991
Claims 1 through 4 and 9 through 11 stand rejected under
35 U.S.C. § 102 as being anticipated by Davis. Claims 1, 2 and 8
stand rejected under 35 U.S.C. § 102 as being anticipated by
Kohda. In the Examiner’s answer, the Examiner sets forth a new
ground of rejection that claims 2, 3, 8 and 11 are indefinite
under 35 U.S.C. § 112, second paragraph. The Appellants respond
to the new ground of rejection by filing on February 7, 1996 an
amendment which amends claims 2, 3, 8 and 11. In the
supplemental Examiner’s answer, the Examiner states that the
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