Appeal No. 95-3091
Application 08/093,311
which reasonably would have suggested that the selection of
the number of bits in the error-correction-code is made based
on the track address of the data sector to be written in.
Indeed, if anything, McCullough appears to suggest the
contrary, that the same length error-correction-code is always
used regardless of the track address. In that connection,
note the following text in column 19, lines 19-23,
of McCullough:
In the present embodiment only RLL (2,7)
encoding is utilized and the disk
controller 182 is programmed to perform 56-
bit ECC
[error correction code] on the data field
and 16-bit CRC on the sector identification
but could be programmed to perform
otherwise if desired.
The examiner has pointed to nothing to indicate that
the programming as described in the above-quoted text is on a
track by track basis. The more plausible reading of
McCullough
is that the length of the code is uniform for all data sectors
in all tracks, even though it can be either 56 bits or 32 bits
long.
Neither Yoshimura nor McCullough discloses or
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