Appeal No. 95-3678
Application 07/545,786
based upon a signal applied to a respective input/output
terminal.
Representative claim 1 is reproduced as follows:
1. A semiconductor memory device for storing data
comprising plural bits comprising:
a plurality of terminals (I/01 to I/04) for respectively
inputting or outputting said data comprising plural bits to
corresponding respective groups of memory cells,
a plurality of circuit means (31 to 34) for manipulating
data, said circuit means provided in respective correspondence to
said plural terminals (I/01 to I/04) and said groups of memory
cells, and
setting means (81 to 84; 91 to 94) for fixedly setting
one of said plurality of circuit means (31 to 34) corresponding
to one of said plurality of terminals to an inactive state while
at least another one of said plurality of circuit means
corresponding to another of said plurality of terminals remains
in an active state,
wherein said setting means is responsive to application
of a deactivating signal to said one of said terminals by setting
the circuit means respectively corresponding thereto to an
inactive state,
wherein said deactivating signal comprises a high voltage
applied by a high voltage generating circuit, said high voltage
being higher than a predetermined range of an operating voltage.
The examiner relies on the following references:
Kawashima et al. (Kawashima) 4,744,058 May 10, 1988
Shinoda et al. (Shinoda) 4,839,860 June 13, 1989
S. M. Sze, Physics of Semiconductor Devices, Copyright 1981 by
John Wiley & Sons, Inc., pages 500-504.
3
Page: Previous 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Next
Last modified: November 3, 2007