Appeal No. 96-0258
Application 08/094,651
The invention pertains to page tables in a virtual memory. More particularly, a
mechanism is provided to translate virtual addresses to physical addresses by using the
virtual addresses of page table entries. A page table prototype value, representative of an
offset between the physical address and the virtual address of any particular page table
entry, is stored in a register. Because consecutive pages of the page table in virtual
memory reside in consecutive page frames in physical memory, the page frame number of
the page table entry prototype is equal to the page frame number of the first page of the
page table minus the virtual page number of the first page of the page table. The page
frame number of the page table entry prototype is a fixed offset which may be added to
the virtual page number of the virtual address of any one particular page table entry to
yield the page frame number of the physical address of the particular page table entry.
Representative independent claim 13 is reproduced as follows:
13. A method for loading a translation buffer of a computer system, which
computer system includes a virtual memory space having data referenced by virtual
addresses and a physical memory space having data referenced by physical addresses;
certain ones of the virtual addresses each having a corresponding physical address, the
translation buffer being loaded with predetermined portions of preselected virtual
addresses and predetermined portions of corresponding physical addresses, the method
comprising the steps of:
a) providing a page table memory space in the physical memory space, the page
table memory space being referenced by physical addresses which locate locations
containing at least a page table entry for a preselected page of the virtual memory space,
the page table entry indicating a physical address of the preselected page of the virtual
memory space;
b) the page table memory space further referenced by a set of virtual addresses,
2
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