Appeal No. 96-1152
Application 08/001,091
The examiner asserts that the initial decoding operation in
each independent claim on appeal is met by the address decoding
logic 796 in Fig. 24. The discussion of this circuit at the
bottom of col. 75, between lines 52 and 58 indicates that address
decoding logic 796 "produces corresponding output values on a
plurality of device-addressed lines. These device-addressed
lines indicate whether the values currently on the data lines
correspond to an address associated with the COM device’s various
address spaces." These various address spaces are discussed in
detail for each of the named lines at col. 76 which, as asserted
by appellants generally indicate that the total effective data
widths of the devices that are referenced in this decoder are
larger than the data widths of the system data bus of the claims
on appeal. Thus, we are in a general agreement with the
appellants general observation at the bottom of page 20 of the
principal Brief on appeal that other address lines must be used
to aid in the address decoding process.
After our study of Baker as well as the positions presented
by both appellants and the examiner, we are in general agreement
with the statement at the top of page 3 of the reply brief, filed
on April 4, 1995:
As claimed, the device having a data
width less than the data width of the bus is
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