Appeal No. 96-0166
Application 08/083,419
means is coupled to the bus means at any moment in time during
the test mode of operation." Such language includes, but does
not require communication between digital units during a test
mode using the bus means. Nor does any other claim language
require communication between units during the test mode.
Appellants also argue that "assuming arguendo the
correctness of position that the 'multiplex gates' 48/50 and
the 'address decode/select circuit' 52 of Powell et al.
correspond to the 'circuit means' and 'bus enable means' of
Applicants' claim 1, Applicants are unable to find anything in
Powell et al. corresponding to the 'means coupled to the scan
control means and responsive to a test signal from the scan
control means to couple the circuit means to the bus enable
means to ensure that only one of the bus enable means is
coupled to the bus at any moment in time'" (Br10). The
examiner finds that "the 'address decode/select circuit' is
the 'coupling means' which controls which module is connected
to the bus through the use of the multiplex gates and ensures
that 'the module under test is operationally isolated from the
other modules'" (EA10). This interpretation does not fit the
claim language. The shift register latches (SRLs) 34, 35, 38,
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