Ex parte MONKOWSKI et al. - Page 2




          Appeal No. 96-0285                                                          
          Application  07/900,528                                                     



                                                                                     
          This is a decision on the appeal under 35 U.S.C. § 134                      
          from the examiner’s rejection of claims 1-19, which constitute              
          all the claims in the application.                                          
          The invention pertains to a method for manufacturing                        
          integrated circuit devices including elements formed according              
          to both CMOS technologies and self-aligned double poly bipolar              
          technologies to create BiCMOS devices.                                      
          Representative claim 12 is reproduced as follows:                           
               12. A process for manufacturing an integrated circuit                  
          device including circuit elements formed according to both                  
          CMOS and bipolar technologies including the steps of                        
                    simultaneously forming portions of circuit elements               
          according to both said CMOS and said bipolar technologies, and              
                    completing said circuit elements according to said                
          bipolar technology including the further steps of                           
                    forming an aperture in a layer, said layer forming                
          an impurity diffusion source for an extrinsic base of at least              
          one circuit element according to said bipolar technology,                   
                    forming an intrinsic base of said at least one                    
          circuit element within said aperture,                                       
                    forming a spacer on sidewalls of said aperture and                
          forming an emitter of said at least one circuit element                     
          deposited within said spacer on said sidewalls of said                      
          aperture.                                                                   
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