Ex parte SETO et al. - Page 4




          Appeal No. 96-3200                                         Page 4           
          Application No. 08/337,196                                                  


          (column 18, lines 25-49), means for selecting one of the                    
          program counters (column 19, line 35-column 20, line 28), an                
          ALU (400), means for transferring (column 2, lines 1-14; Figure             
          13) and means for storing the information indicating the order              
          (431n, 431m).  The examiner admits that Watson lacks an express             
          teaching for storing a plurality of orders, although it is                  
          contended that Watson does teach a register in which the                    
          ordering of the schedule is alterable by the ALU and the                    
          allocation of the time interval is determined by the code set               
          in the register.  The examiner then relies on Lee for a                     
          teaching of a plurality of schedules available for various                  
          tasks and combines this teaching with Watson, stating that it               
          would have been obvious “to modify the teaching of                          
          Watson...with that of Lee...because it would improve the                    
          efficiency of the system by allowing for predetermined                      
          optimization of the schedule for given task [sic]” [answer-page             
          5].                                                                         
               The instant claimed invention calls for a single                       
          microprocessor to simultaneously process a plurality of                     
          programs.  Watson, on the other hand, discloses a plurality of              
          processors which share an ALU.  A sequence control 418 in                   







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