Appeal No. 97-1542
Application No. 08/159,648
Claim 1 is illustrative of the claimed invention, and it
reads as follows:
1. An integrated circuit, comprising:
(a) at least one transistor formed at a frontside surface
of a substrate;
(b) a first ground plane covering portions of said
frontside surface, wherein portions of said transistor remain
uncovered by said first ground plane;
(c) an insulating layer over said uncovered portions of
said transistor;
(d) a bond pad at a backside surface of said substrate,
said backside surface opposite said frontside surface; and
(e) a conducting via through said substrate coupling said
at least one transistor to said bond pad.
No references were relied on by the examiner.
Claims 1 through 12 and 16 through 21 stand rejected
under the first paragraph of 35 U.S.C. § 112 for "containing
subject matter which was not described in the specification in
such a way as to enable one skilled in the art to which it
pertains, or with which it is most nearly connected, to make
and/or use the invention" (Answer, page 3). According to the
examiner (Answer, page 4), "[t]he newly added claim
limitation, 'a first ground plane covering portions of said
frontside surface,' in claim[s] 1 and 9 pertaining to partial
2
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