Ex parte SUZUKI - Page 2




          Appeal No. 1997-2292                                                        
          Application No. 08/483,839                                                  


          integrated circuit for producing a program control signal only              
          when a given number of clock pulses are detected during a                   
          period when a trigger signal changes from a first state to a                
          second state.                                                               
               Claim 1 is the only independent claim on appeal, and it                
          reads as follows:                                                           
               1.  A semiconductor integrated circuit comprising:                     
               a clock number-detecting circuit for detecting a number                
          of clocks of a serially input pulse train, said clock number-               
          detecting circuit having an input port for receiving                        
          said serially input pulse train and an output port for                      
          providing an output signal having a given form only when the                
          serially input pulse train has a predetermined number of                    
          clocks; and                                                                 
               a program control circuit for delivering a program                     
          instruction to a memory, said program control circuit having a              
          first input port coupled to said clock number-detecting                     
          circuit output port for receiving said clock number-detecting               
          circuit output signal, a second input port for receiving a                  
          trigger signal and an output port for supplying said program                
          instruction, wherein said program control circuit delivers                  
          said program instruction only when the signal received at said              
          first input port has the given form while said trigger signal               
          changes from a first state to a second state to prevent                     
          writing error data to the memory.                                           
               The references relied on by the examiner are:                          
          Lefebvre et al. (Lefebvre)    4,873,666                Oct. 10,             
          1989                                                                        
          Geadah et al. (Geadah)        4,873,667                Oct. 10,             
          1989                                                                        

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