Ex parte WISOR et al. - Page 6




          Appeal No. 97-2472                                         Page 6           
          Application No. 08/223,770                                                  


          controlling and configuring power control parameters, since                 
          constraints on memory space could easily be overcome.”  (Id.                
          at 5.)                                                                      


               In deciding that a novel combination would have been                   
          obvious, there must be supporting teaching in the prior art.                
          In re Newell, 891 F.2d 899, 901, 13 USPQ2d 1248, 1250 (Fed.                 
          Cir. 1989).  In applying this precedent to the appellants’                  
          invention, we agree with the appellants that the claimed                    
          program register differs from the cited address control scheme              
          of Faucher.  (Appeal Br. at 10.)  Claim 15 specifies in                     
          pertinent part “storing a value within a program register that              
          sets an address location of an index register ....”  This is                
          neither taught nor  suggested by Faucher.                                   


               The cited portions of the Faucher reference disclose an                
          address compare/bank select/remapping unit 58 within a memory               
          controller 20.  The unit receives an address from a central                 
          processing unit 12 or other component.  It “performs an                     
          address compare” to determine which of Faucher’s memory banks               
          30  corresponds to the address.  Col. 5, ll. 48-51.  The unit               







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